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  • Synopsys and GlobalFoundries launch a global pilot program offering a ‘chip design to tapeout’ curriculum to universities.

    Viz R.

    Insights:

    • Synopsys and GlobalFoundries launch a global pilot program offering a ‘chip design to tapeout’ curriculum to universities.
    • Over 40 universities worldwide participate, gaining access to professional-grade EDA tools and advanced manufacturing capabilities.
    • The program bridges academia and industry by enabling students to design and fabricate real silicon chips affordably.
    • Training for professors and comprehensive course content are integral to embedding hands-on chip design into academic curricula.
    • This initiative supports workforce development and accelerates semiconductor innovation by cultivating practical engineering skills.

    Synopsys and GlobalFoundries have partnered to introduce a pioneering educational program aimed at equipping university students with practical experience in chip design and fabrication. This pilot initiative, launching at over 40 universities worldwide, provides students and professors with professional-grade electronic design automation (EDA) tools from Synopsys and access to manufacturing through GlobalFoundries’ multi-project wafer program. By significantly lowering the cost barriers associated with custom silicon production, the program allows students to transform design concepts into tangible silicon chips.

    The collaboration goes beyond providing tools; it includes training professors to lead hands-on courses and offers detailed curriculum support. This integrated approach bridges theoretical learning with real-world semiconductor processes, fostering a deeper understanding and skillset for the next generation of engineers. The program exemplifies a commitment to semiconductor workforce development and academic-industry collaboration, addressing critical skill gaps while accelerating innovation.

    GlobalFoundries’ University Partnership Program amplifies this effort by aligning research projects with cutting-edge semiconductor technologies, further enriching the educational experience. Together, Synopsys and GlobalFoundries are shaping the future of chip design education and empowering talented students to contribute meaningfully to the semiconductor industry’s evolving landscape.

    For more information visit

    Note: All images and Products & Trademarks mentioned in this article are copyrighted to companies:

    Synopsys, Inc., GlobalFoundries

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  • Synopsys and TSMC Drive AI Chip Innovation with Advanced EDA and IP

    Synopsys and TSMC Drive AI Chip Innovation with Advanced EDA and IP

    Viz R.

    Insights:

    • Synopsys and TSMC collaborate on cutting-edge multi-die AI chip designs using advanced EDA flows and IP solutions.
    • The 3DIC Compiler platform supports TSMC’s 3D packaging technologies, enabling faster tape-outs and greater design productivity.
    • Certified Synopsys digital and analog EDA tools are optimized for TSMC’s N2P, A16, and upcoming A14 processes.
    • Synopsys delivers comprehensive IP portfolios supporting high-performance standards like HBM4, PCIe 7.0, and automotive-grade IP for TSMC’s advanced nodes.
    • Collaboration extends into silicon photonics and advanced packaging technologies, enhancing multi-die integration and energy-efficient AI chip performance.

    Synopsys continues to strengthen its partnership with TSMC to advance semiconductor innovation focused on AI and multi-die designs. Leveraging TSMC’s leading-edge processes such as N2P, A16, and future A14, Synopsys provides certified analog and digital EDA flows that optimize chip performance, power efficiency, and scalability. Their 3DIC Compiler platform supports complex 3D integration technologies like SoIC and CoWoS, enabling faster design cycles and improved productivity for multi-die chip solutions.

    Additionally, Synopsys offers an extensive portfolio of IP solutions crafted for TSMC’s advanced nodes, including cutting-edge interfaces such as PCIe 7.0 and HBM4, as well as automotive-grade IP for safety-critical applications. This combined effort ensures that customers can deliver differentiated AI chips that meet stringent performance and reliability requirements while minimizing power consumption. Further collaboration in silicon photonics demonstrates their commitment to pushing the boundaries of system performance in multi-die and AI applications.

    Through this ongoing partnership, Synopsys and TSMC enable semiconductor companies to accelerate time to market and push innovation in AI-driven and multi-die integrated circuit designs, making them key enablers of the next generation of advanced semiconductor technology.

    For more information visit

    All images and Products & Trademarks mentioned in this article are copyrighted to companies involved:

    Synopsys, TSMC

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  • Siemens Unveils AI-Enhanced EDA Toolset at DAC 2025

    Viz R.

    Siemens Unveils AI-Enhanced EDA Toolset at DAC 2025

    At DAC 2025 in San Francisco, Siemens Digital Industries Software introduced an AI-enhanced EDA toolset designed to accelerate semiconductor and PCB design workflows. The centerpiece is a purpose-built EDA AI system that combines secure, generative and agentic AI with deep customization and seamless integration across the entire EDA flow. Siemens frames the system as a strategic investment to help design teams handle increasing complexity and bring breakthrough designs to market faster.

    The EDA AI system supports open, customizable workflows: customers can ingest their own EDA data, tailor AI-driven processes, and deploy AI where it adds the most value. Deployment is flexible (on-premises or cloud) with enterprise-grade security, robust access controls, and a centralized multimodal data lake that supports a range of AI models, from large language models to traditional ML and reinforcement learning.

    Siemens is leveraging NVIDIA technologies to accelerate EDA tasks, including NVIDIA NIM microservices for scalable inference across cloud and on-premises, and the Llama Nemotron for enhanced context reasoning and tool-calling. Industry perspectives from NVIDIA note that AI agents can significantly boost productivity across layout optimization, simulation, and verification.

    Key portfolio components highlighted include:
    – Aprisa AI: integrated into RTL-to-GDS flow, offering AI-driven design exploration, PPA optimization, and a 10x productivity boost, with 3x faster tapeout and around 10% better PPA.
    – Calibre Vision AI: chip-integration signoff with clustering, state bookmarks, and collaboration enhancements, integrated into existing layout viewers.
    – Solido: generative and agentic AI across the custom IC process from schematic to verification, enabling substantial productivity gains.

    Availability is currently in early access across Siemens EDA offerings, with more details on Siemens’ EDA AI pages.

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  • Cadence to Acquire Hexagon’s Design & Engineering Unit to Boost Multiphysics System Design

    Viz R.

    Cadence to Acquire Hexagon’s Design & Engineering Unit to Boost Multiphysics System Design

    Cadence Design Systems announced a definitive agreement to acquire the Design & Engineering (D&E) business of Hexagon AB, including MSC Software, for about €2.7 billion. The deal funds 70% in cash and 30% in Cadence common stock to Hexagon, and is expected to close in the first quarter of 2026, subject to regulatory approvals.

    The acquisition accelerates Cadence’s Intelligent System Design strategy by expanding its System Design & Analysis portfolio and strengthening its presence in structural analysis alongside its existing electromagnetics, electrothermal, and CFD capabilities. Hexagon D&E brings flagship multiphysics solvers, notably MSC Nastran and Adams, which are industry standards for structural and multibody dynamics simulation. These tools will augment Cadence’s capabilities and enable a unified, end-to-end multiphysics platform that supports earlier, more integrated analyses during the design cycle.

    This move enhances Cadence’s reach into aerospace, automotive, robotics, and industrial applications, complementing its Beta CAE acquisition from 2024. The combined solution set aims to drive convergence of electrical and mechanical design—supporting robotics, autonomous systems, physical AI, and electrified vehicle development. The deal also broadens Cadence’s customer base to major OEMs and Tier 1 suppliers including Volkswagen Group, BMW, Toyota, Lockheed Martin, BAE, and Boeing.

    Hexagon D&E generated about $280 million in revenue in 2024 and employs over 1,100 people across global sites, with strong R&D, sales, and support teams. The transaction signals Cadence’s push to offer comprehensive, converged simulation for tomorrow’s complex systems.

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