EDA TIMES

Electronic Design Automation for AI era!

inc. (ase)

  • Synopsys and GlobalFoundries launch a global pilot program offering a ‘chip design to tapeout’ curriculum to universities.

    Viz R.

    Insights:

    • Synopsys and GlobalFoundries launch a global pilot program offering a ‘chip design to tapeout’ curriculum to universities.
    • Over 40 universities worldwide participate, gaining access to professional-grade EDA tools and advanced manufacturing capabilities.
    • The program bridges academia and industry by enabling students to design and fabricate real silicon chips affordably.
    • Training for professors and comprehensive course content are integral to embedding hands-on chip design into academic curricula.
    • This initiative supports workforce development and accelerates semiconductor innovation by cultivating practical engineering skills.

    Synopsys and GlobalFoundries have partnered to introduce a pioneering educational program aimed at equipping university students with practical experience in chip design and fabrication. This pilot initiative, launching at over 40 universities worldwide, provides students and professors with professional-grade electronic design automation (EDA) tools from Synopsys and access to manufacturing through GlobalFoundries’ multi-project wafer program. By significantly lowering the cost barriers associated with custom silicon production, the program allows students to transform design concepts into tangible silicon chips.

    The collaboration goes beyond providing tools; it includes training professors to lead hands-on courses and offers detailed curriculum support. This integrated approach bridges theoretical learning with real-world semiconductor processes, fostering a deeper understanding and skillset for the next generation of engineers. The program exemplifies a commitment to semiconductor workforce development and academic-industry collaboration, addressing critical skill gaps while accelerating innovation.

    GlobalFoundries’ University Partnership Program amplifies this effort by aligning research projects with cutting-edge semiconductor technologies, further enriching the educational experience. Together, Synopsys and GlobalFoundries are shaping the future of chip design education and empowering talented students to contribute meaningfully to the semiconductor industry’s evolving landscape.

    For more information visit

    Note: All images and Products & Trademarks mentioned in this article are copyrighted to companies:

    Synopsys, Inc., GlobalFoundries

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  • Siemens and ASE Revolutionize 3D Semiconductor Packaging with Innovator3D IC

    Viz R.

    Insights:

    • Siemens Digital Industries Software partners with ASE to advance 3Dblox workflows for ASE’s VIPack™ platform.
    • The collaboration focuses on Fanout Chip-on-Substrate, FOCoS-Bridge, and TSV-based 2.5D/3D IC packaging technologies.
    • The partnership accelerates design flexibility, package innovation, and time-to-market for complex chiplet-based integration.
    • Siemens’ Innovator3D IC solution is fully certified for 3Dblox, enabling efficient package design and verification.
    • 3Dblox and Innovator3D IC enable hierarchical device planning crucial for next-generation heterogeneous integration.

    Siemens Digital Industries Software has joined forces with Advanced Semiconductor Engineering, Inc. (ASE) to develop and validate 3Dblox-based workflows for ASE’s advanced VIPack™ platform. This collaboration targets key semiconductor packaging technologies, including Fanout Chip-on-Substrate (FOCoS), FOCoS-Bridge, and Through Silicon Via (TSV)-based 2.5D and 3D ICs. Siemens’ Innovator3D IC solution, fully certified for the 3Dblox standard, acts as a rapid design assembly exploration tool that fosters interoperability and streamlines the design process.

    ASE’s VIPack platform, a next-generation heterogeneous integration architecture, supports comprehensive co-design across six core packaging pillars. It leverages advanced redistribution layer (RDL) processes and 3D technologies to achieve ultra-high density and superior performance by integrating multiple chips into one package. The collaboration enhances design flexibility and accelerates the time-to-market by allowing customers to quickly address complex packaging challenges with EDA tool compatibility.

    The partnership also emphasizes System Technology Co-optimization (STCO) through hierarchical device planning, imperative for advanced chiplet-based heterogeneous integration. Both Siemens and ASE acknowledge their ongoing commitment to 3Dblox as a foundation for semiconductor package design that delivers open interoperability and innovation for future chip packaging solutions.

    For more information visit

    Siemens Digital Industries Software, Advanced Semiconductor Engineering, Inc. (ASE)

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